GaAs-based transistors and circuits are widely used in, for instance, wireless communication apparatus, due inter alia to the relatively high electron mobility in GaAs, the availability of semi-insulating GaAs substrates, and the relative simplicity of manufacturing processes.
Si-based metal oxide semiconductor (MOS) field effect transistors (FETs) are known, and are widely used. Among the advantages of Si-based MOS-FETs are simplicity, low power and low cost. The most common Si-based MOS-FET is the enhancement-type MOS-FET, which is "normally off" with zero gate voltage.
As is well known, an important factor in Si MOS-FET technology is the ease with which a high quality stable and controllable silicon oxide layer can be formed on the conventional (100) surface of a Si wafer. This includes a very low (e.g., 10.sup.10 cm.sup.-2 eV.sup.-1 or less) surface state density at the Si/silicon oxide interface.
Much effort has been directed towards GaAs-based MOS-FETs. See, for instance, T. Mimura et al., IEEE Transactions on Electron Devices, Vol. ED-27(6), p. 1147 (June 1980) for a review of early work. The authors of that paper concluded (p. 1154) that, although the main features of the results achieved so far are promising, " . . . some technological problems remain, including anomalous behavior of the dc and low-frequency operation of the devices. Undoubtedly, these problems are associated with the high density of surface states involved in the GaAs MOS system." See also A. Colquhoun et al., IEEE Transactions on Electron Devices, Vol. ED 25(3), p. 375 (March 1978), and H. Takagi et al., IEEE Transactions on Electron Devices, Vol. ED 25 (5), p. 551 (May 1978). The former discloses a device that comprises an etched notch that defines the channel thickness. Such a non-planar structure would be relatively difficult to make repeatably, and thus is less desirable than a planar MOS-FET would be.
As pointed out by Mimura et al., the early devices suffered from poor gate oxide/GaAs interface quality, including a high density of interface states. In recent years, substantial effort has been directed at this problem.
For instance, U.S. Pat. No. 5,451,548 discloses formation of a Ga.sub.2 O.sub.3 film on GaAs by e-beam evaporation from a high purity single crystal of Gd.sub.3 Ga.sub.5 O.sub.12. See also U.S. Pat. No. 5,550,089, and U.S. patent application Ser. No. 08/408,678 U.S. Pat. No. 5,821,171 (respectively grandparent and parent of this CIP application, incorporated herein by reference), which disclose GaAs/Ga.sub.2 O.sub.3 structures with midgap interface state density below 10.sup.11 cm.sup.-2 eV.sup.-1. See also M. Passlack et al., Applied Physics Letters, Vol. 69(3), p. 302 (July 1996) which reports on the thermodynamic and photochemical stability of low interface state density GaAs/Ga.sub.2 O.sub.3 /SiO.sub.2 structures that were fabricated using in situ molecular beam epitaxy. Other pertinent publications are M. Passlack et al., Applied Physics Letters, Vol. 68(8), p. 1099 (February 1996); and M. Hong et al., J. of Vacuum Science and Technology B, Vol. 14(3), p. 2297, (May/June 1996).
However, despite the extensive effort by many researchers over many years, and the resulting large number of publications, to date it has not been possible, to the best of our knowledge, to fabricate GaAs-based MOS-FETs that can meet commercial requirements. Specifically, despite the successful formation of high quality, low interface state density GaAs/Ga.sub.2 O.sub.3 test structures, it has apparently not yet been possible to devise a process of making a GaAs MOS-FET (including enhancement-type MOS-FETs) that can preserve the interface quality to the extent that an inversion layer can be formed at the semiconductor/gate oxide interface of an actual MOS-FET.
In the absence of an acceptable GaAs-based MOS-FET technology, GaAs-based integrated circuits for instance require double supply voltages and have relatively high power consumption, resulting in turn in relatively short battery lifetime and requiring relatively complex circuitry in, for instance, battery-powered personal communication devices. Such ICs are of limited usefulness.
In view of the significant advantages that would attend availability of commercially acceptable GaAs-based MOS-FETs, it would be highly desirable to have available such devices, especially enhancement mode (normally "off") MOS-FETs. This application discloses such devices. It also discloses an exemplary process of making such devices that provides low gate oxide/semiconductor interface state density, and can preserve this low state density throughout the subsequent processing steps.